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(O8X9:F+G,H,I, X,$Y,,\,L],T^,ob,c-7d-e-f-l-u-v-w.x.y/z//$/(/./pClibcpuid-tools0.6.2bp155.1.6Tools based on libcpuidThis package provides tools based on libcpuid.dkBlamb58m^SUSE Linux Enterprise 15 SP5openSUSEBSD-2-Clausehttps://bugs.opensuse.orgDevelopment/Libraries/C and C++https://github.com/anrieff/libcpuidlinuxx86_64hf큤dkBdkB145fe25bd127e2d61a375bfde4384cd7c255383746ba82eae2fdd96431a1b25fcc260ee4753da13355c42294eefbea5073f1dfcdd96936b55ef13f1aa0011557rootrootrootrootlibcpuid-0.6.2-bp155.1.6.src.rpmlibcpuid-toolslibcpuid-tools(x86-64)@@@@@    libc.so.6()(64bit)libc.so.6(GLIBC_2.2.5)(64bit)libc.so.6(GLIBC_2.3.4)(64bit)libc.so.6(GLIBC_2.4)(64bit)libcpuid.so.16()(64bit)rpmlib(CompressedFileNames)rpmlib(FileDigests)rpmlib(PayloadFilesHavePrefix)rpmlib(PayloadIsXz)3.0.4-14.6.0-14.0-15.2-14.14.3ccF@c8+ba(`]__@_5+@^^)\f\eX@Y9<@X<@XkDirk Müller Martin Pluskal Dirk Müller Martin Pluskal Martin Pluskal Martin Pluskal Martin Pluskal Martin Pluskal Martin Pluskal Martin Pluskal Martin Pluskal Jan Engelhardt Martin Pluskal mpluskal@suse.commpluskal@suse.comdap.darkness@gmail.com- update to 0.6.2: * Support for AMD Raphael * Support for AMD Dali * Support for AMD Van Gogh * Fix stuck cpuid_tool due to set_cpu_affinity() on Windows (#172) * Remove AMD Warhol from DB (Zen3+ cancelled) * Fix physical core count computed by cpu_identify_all() when HT is disabled (#175) * Fix shared library symlinks with CMake (#174) * Support for Intel Raptor Lake-S * Fix segmentation fault in cpu_identify_all() for single-core CPUs * Support for Intel Penryn L * Support for Intel Tremont * Support for AMD Mendocino * Support for Intel Ice Lake (Xeon-D) * Support for AMD Zen 2 Desktop Kit CPUs (4700S + 4800S) * Support for AMD Athlon 64 Sherman- Add missing dependency- update to 0.6.0: * Support for AMD Rembrandt * Support for AMD Warhol * Remove Debian package from source tree (#165) * Fix build under Clang 15 (#167) * Support for AMD Athlon Godavari * Support for hybrid CPU like Intel Alder Lake (#166) * Detect presence of hypervisor (#169) * Decode deterministic cache info for AMD CPUs (#168) * Add cache instances field in cpu_id_t and system_id_t (#168) * Support AMD Bald Eagle * Support for more AMD Godavari (Athlon) * Rename AMD Bulldozer to Zambezi * Support for AMD Interlagos * Support for AMD Abu Dhabi * Support for AMD Beema * Support for AMD Steppe Eagle * Support for more AMD Kabini (Sempron + Athlon) * Improve msr_serialize_raw_data() * Support for AMD Zen 2 custom APU for Steam Deck- Update to version 0.5.1+git.1644144775: * Tests: add more Zen2 tests from InstLatx64 * DB: add Lucienne * Report memory allocation failures without segfaulting. (#160) * Don't link with msrdriver.c on non-Windows platform. (#159)- Update to version 0.5.1+git.1626502835: * CMake: reduce min cmake requirement 3.14 -> 3.13 * Fix failing CI builds introduced by cb5fdd1 * Use popcount64 from libc when available (#152) * allow to build either static or shared (#156) * cmake: allow libcpuid to be added as a CMake subproject (#155) * fix installation of BUNDLE if iOS (#154) * cmake: add an option to build tests (#153) * Fix #150: CPU Family/Model is used as Ext.Family/Model * DB: add Tiger Lake- Update to version 0.5.1+git.1616323866: * Doxygen: remove deprecated option * Release version 0.5.1 (#151) * Tests: fix truncation warnings in convert_instlatx64 * Fix warning with a comment * DB: add Rocket Lake * DB: add Milan * Tests: fix --create argument in convert_instlatx64 tool * DB: add Cezanne * DB: add Xeon E3 1275 * CI: use microsoft/setup-msbuild@v1.0.2 * CI: fix deprecated commands * Tests: add Core i5 8265U (Whiskey Lake-U) * DB: add Whiskey Lake-U- Update to version 0.5.0+git.20201114: * Tests: fix path for cpuid_tool When we use CMake, the 'cpuid_tool' binary is in the 'build' directory * DB: add Vermeer https://en.wikichip.org/wiki/amd/cores/vermeer Test file converted from http://users.atw.hu/instlatx64/AuthenticAMD/AuthenticAMD0A20F10_K19_Vermeer_CPUID1.txt * DB: add Gemini Lake https://en.wikichip.org/wiki/intel/cores/gemini_lake Reported in X0rg/CPU-X#164 * DB: add Comet Lake-U https://en.wikipedia.org/wiki/Comet_Lake_(microprocessor)#U-series_(Medium_power) Reported in X0rg/CPU-X#162 * DB: add Kaby Lake-G https://en.wikichip.org/wiki/intel/cores/kaby_lake_g Test file converted from http://users.atw.hu/instlatx64/GenuineIntel/GenuineIntel00906E9_KabylakeG_CPUID.txt * DB: add Kaby Lake Refresh https://en.wikichip.org/wiki/intel/cores/kaby_lake_r Core i5 8250U was detected as Coffee Lake wrongly. Reported in X0rg/CPU-X#161- Update to version 0.5.0+git.20201019: * Fixes issue #148: CMake build script not in 0.5.0 tarball release- Update to version 0.5.0+git.20200528: * Related to c2645d0. Convert all python scripts to Python 3. * Add Downloads section on Readme.md Close #140 * Add I-Nex to the users list- Update to version v0.5.0+git.20200526: * CI: remove 'v' prefix in assets * CI: checkout sources before making release * Release version 0.5.0 (#146) * Add GitHub workflows for CI/CD - CI: it will check code consistency and run tests for all events (except for tags) - CD: it will build all assets and create a draft Close #122 * check-consistency: return error count * Fix code consistency Result before this patch: * CMake: fix include directory * CMake: fix build on Windows * CMake: fix install target's export * tests: fix unused-result warning in convert_instlatx64 tool * Update .gitignore * CMake: fix Unix install and format * Add config file for cmake-format It formats CMakeLists.txt files See https://github.com/cheshirekow/cmake_format * Doxygen: upgrade Doxyfile to avoid warnings warning: Tag 'PERL_PATH' at line 1032 of file '/libcpuid/build/libcpuid/Doxyfile' has become obsolete. To avoid this warning please remove this line from your configuration file or upgrade it using "doxygen -u" warning: argument 'a4wide' for option PAPER_TYPE is not a valid enum value Using the default: a4! * Doxygen: turn on quiet mode It is too noisy with CMake * Detect AVX512VBMI and AVX512VBMI2 features on Intel CPUs More information: https://en.wikichip.org/wiki/x86/avx-512 Resolve #134 * Detect ABM feature on Intel CPUs Resolve #144 * Detect RDSEED/ADX/SHA_NI features on AMD CPUs These x86 instruction set extensions are present since Zen micro-architecture Resolve #145 * Update cpuid_main.c * DB: add Ivy Bridge-E (Xeon) * Tests: update all tests to add fields for L1I * Tests: update to add L1I information Related to 25d0614811991c855ce7db0d898dbc6200dfa840 Dump of Core i5 520m from CPU-X#119 * Add L1 Instruction Cache information Some CPUs does not have the same associativity for L1D and L1I, as reported in X0rg/CPU-X#119 It adds l1_instruction_assoc and l1_instruction_cacheline in cpu_id_t To avoid confusing, also adds l1_data_assoc and l1_data_cacheline l1_assoc and l1_cacheline are leave untouched for backward compatibility * Ignore .vscode directory Yes, 0b05f45e03b0aa39a65eba9451b59c9381e8474c was about VS Code * Tests: add amd_fn8000001dh subleaf See e562798cecf4af852fdfef4b0e7bf159a5d9b4de * Tests: parse subleafs in convert_instlatx64 Also, it adds 0xffffffff when data is not available, so all lines are presents * Re-fix L3 cache associativity detection on AMD Zen 2 CPUs Previous commit: 848394ee460c70298f91569d33f2c156bddb0f6c * Applied a patch from @tavplubix * Use constant for registers name It helps when reading technical documentation and it avoids 'magic values' * Remove all trailling spaces It is annoying with some text editors * DB: fix Rome extended model * DB: add Renoir APUs * Tests: add Core i5 8250U Related to X0rg/CPU-X#129 * DB: add Ice Lake CPUs * DB: add Comet Lake CPUs * DB: add Coffee Lake Refresh It differs from Coffee Lake by stepping Core i5 9400 and 9500 will still be detected as Coffee Lake because it only differs by revision... * DB: add Coffee Lake-U It differs from Kaby Lake-U by stepping * DB: add Cannon Lake CPUs * DB: clarify Intel Generations * tests: remove duplicate addresses in RAW part * tests: fix convert_instlatx64 tool * Fix L3 cache associativity detection on AMD Zen 2 CPUs * Fix CMake * Add CMake * Add CMake- Update to version 0.4.1+git.20200102: * DB: Add Threadripper (Castle Peak) * Fix compilation on non-x86/ARM architectures. * Add support for get_total_cpus on Haiku. * Some typo fixes in human readable text. * Add Xeon CLX (Cascade lake-based) using data from PR #129 * add support to feature intel avx512_vnni * AARCH64 stub * Ignore convert_instlatx64 binary * add Hygon Dhyana C86 7seris test file * Add Hygon Dhyana detect support - Switch to _service- Use noun phrase in summaries.- Update to version 0.4.1: * Better support for Skylake Core i5 (#76) * Misdiagnosis microarchitecture for i3-3220T (#81) * Ability to dump MSR values to a file (PR #82) * AMD Ryzen support (#86) * Support for Coffee and Kaby Lake (#104) * Support for Raven Ridge and Threadripper (#106) * Support for Pinnacle Ridge (#111) * Fix P-III Celeron misdetection * Support for Skylake-X (#116) * Support for Zen+ Threadripper- Enable internal tests- Update to version 0.4.0: * A backwards-incompatible change, since the sizeof cpu_raw_data_t and cpu_id_t are now different. * Better detection of AMD clock multiplier with msrinfo. * Support for Intel SGX detection - Some packaging cleanups * Use url as source * Split binary from devel package- Update from 0.1.0 to 0.3.0: * Added intel_fn11 fields to cpu_raw_data_t to handle new processor topology enumeration required on Core i7 * Support for Intel Nehalem architecture CPUs (Core i7, Xeon i7) * Added support for greater more accurate CPU clock measurements with cpu_clock_by_ic() * Support for AMD Bulldozer CPUs, 128-bit SSE unit size checking. A backwards-incompatible change, since the sizeof cpu_id_t is now different. * Support for Ivy Bridge, and detecting the presence of the RdRand instruction. * Support for newer processors up to Haswell and Vishera * Fix clock detection in cpu_clock_by_ic() for Bulldozer * Support for detection of AVX/AVX2/BMI1/BMI2 * More entries supported in cpu_msrinfo() * Rename of some CPU codenames, made more consistent * *BSD and Solaris support (unofficial) * A backwards-incompatible change, since the sizeof cpu_raw_data_t and cpu_id_t are now different. * Support for processors up to Skylake. * Fix clock detection in cpu_clock_by_ic() for Skylake. * Support up to 8 subleaf entries for CPUID leaf 04 and detection of L4 cache. * MSR functions supported on FreeBSD. * INFO_VOLTAGE request supported by cpu_msrinfo().lamb58 16847510370.6.2-bp155.1.60.6.2-bp155.1.6cpuid_toolcpuid_tool.1.gz/usr/bin//usr/share/man/man1/-fmessage-length=0 -grecord-gcc-switches -O2 -Wall -D_FORTIFY_SOURCE=2 -fstack-protector-strong -funwind-tables -fasynchronous-unwind-tables -fstack-clash-protection -gobs://build.opensuse.org/openSUSE:Backports:SLE-15-SP5/standard/2487a0efe3f134aedc1b02a39b54ddd3-libcpuidcpioxz5x86_64-suse-linuxELF 64-bit LSB shared object, x86-64, version 1 (SYSV), dynamically linked, interpreter /lib64/ld-linux-x86-64.so.2, BuildID[sha1]=b8994383d922eb46949fb1447c548144752eeb0f, for GNU/Linux 3.2.0, strippedtroff or preprocessor input, ASCII text (gzip compressed data, max compression, from Unix)RRRRRe5?utf-8e0eb4b7127c088f7a1db82e10414213370537b450341f72c55c402e8e07a2a19? 7zXZ !t/n$_] crv9w>N"3"?qչzH00V1M^[i쏢F#h.qEI HW^7"ͱ!j,\!|+7raՠ &QV@1B ڕZ5쩇;=Sh6@q+q"-O3T>8F%Hay碧y)q5&`\LdKɹcnsN]yY#|&xI͠;G-eĂ~!/y^І/e8B-GJ([']juAK7c&}\@_azy]#zߌ '3uP8+YMJw̒UmW<G_'LV:3=prK6Ӕ; 9xվ[HUskUrM/zfѿ)jPjÿCwߴZGùvt'pWn *Fw>ͭRn߮ s3pxMY2*k=uO6ARtR ϋ.4Ν}& lK`A٤sa,Wf9!|1k!Wa68%{6o%H˿k8LTr$˂b@J3^-[ Bh{DyH>&Ehgv !2T IfCǁ9IM~LX.^fŮI(- "j9aJHŤ8&nSQ*W"hH?@w '0trIT}>3JV;;ڪphs]i]XI:e:EPT ͿkW:*ÌA4 3Nx3K_'O"j@E[qtp,۲']qrZn5=?t%DD[O "3+eJgk6 Cԁy3`q1 RHȈ8R:VR7| Y@vޭ*$`g{6S>y Ie`eL4Y/}9|R,*lΤ|ZxqT~,lONWi][[Q.X 76wgUPڇoMlm;[Ӟpwڽi!ߋ|NB_ddTs3hkiEK6UC/n O-XL "{f07sCv9m:)[nEbHV^Rmް\C"{ *ܮ4Y?50Ta%38ith֝<β<=c_q>-uGA Nf"]oN!Qցϯucckg*ν]gXbVa1 d;t%O> $ɃU$Ht\EoO2].i:H_"-b3Uw_?' 䆶:"Zt0َ+j+msS7d iTf!t X"/ٹ3D0߅Bj(Y<+zO7Q3K;N|;J{iޡä0GAXv~7){mp h 2Fv/!ӧ`p6m :jBDUAQSղZE ! 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