libcpuid15-0.5.1+git.1644144775-bp155.1.3 >  A c΋!M@eeeեT=?LeT,Rp@+4?+$d " , Y  )MS\p z   ] t8p(8 9$ : >'M@'\F'kG'H'I'X'Y'\'](^(Mb(c)7d)e)f)l)u)v)w*xx*y* z****+ Clibcpuid150.5.1+git.1644144775bp155.1.3Library providing CPU identification for x86Libcpuid provides CPU identification for the x86 (and x86_64) architectures.cds390zl28SUSE Linux Enterprise 15 SP5openSUSEBSD-2-Clausehttps://bugs.opensuse.orgDevelopment/Libraries/C and C++https://github.com/anrieff/libcpuidlinuxs390x8A큤c]c`cdaaca919428e3ca5d581108c5b5cabff38be71b73ab40a946035899808173feb9d10264f4385afe458436c934d86a236c33cd686ca385d0435d7c5624c772928dc2d1d843ab08ced2e4c889f3d482055675752c715313ce34239a193e6461475772libcpuid.so.15.0.1rootrootrootrootrootrootrootrootrootrootlibcpuid-0.5.1+git.1644144775-bp155.1.3.src.rpmlibcpuid.so.15()(64bit)libcpuid15libcpuid15(s390-64)@@@@@@@@    /sbin/ldconfig/sbin/ldconfigld64.so.1()(64bit)ld64.so.1(GLIBC_2.3)(64bit)libc.so.6()(64bit)libc.so.6(GLIBC_2.2)(64bit)libc.so.6(GLIBC_2.3)(64bit)libc.so.6(GLIBC_2.3.4)(64bit)libc.so.6(GLIBC_2.4)(64bit)libc.so.6(GLIBC_2.7)(64bit)rpmlib(CompressedFileNames)rpmlib(FileDigests)rpmlib(PayloadFilesHavePrefix)rpmlib(PayloadIsXz)3.0.4-14.6.0-14.0-15.2-14.14.3ba(`]__@_5+@^^)\f\eX@Y9<@X<@XkMartin Pluskal Martin Pluskal Martin Pluskal Martin Pluskal Martin Pluskal Martin Pluskal Martin Pluskal Martin Pluskal Jan Engelhardt Martin Pluskal mpluskal@suse.commpluskal@suse.comdap.darkness@gmail.com- Update to version 0.5.1+git.1644144775: * Tests: add more Zen2 tests from InstLatx64 * DB: add Lucienne * Report memory allocation failures without segfaulting. (#160) * Don't link with msrdriver.c on non-Windows platform. (#159)- Update to version 0.5.1+git.1626502835: * CMake: reduce min cmake requirement 3.14 -> 3.13 * Fix failing CI builds introduced by cb5fdd1 * Use popcount64 from libc when available (#152) * allow to build either static or shared (#156) * cmake: allow libcpuid to be added as a CMake subproject (#155) * fix installation of BUNDLE if iOS (#154) * cmake: add an option to build tests (#153) * Fix #150: CPU Family/Model is used as Ext.Family/Model * DB: add Tiger Lake- Update to version 0.5.1+git.1616323866: * Doxygen: remove deprecated option * Release version 0.5.1 (#151) * Tests: fix truncation warnings in convert_instlatx64 * Fix warning with a comment * DB: add Rocket Lake * DB: add Milan * Tests: fix --create argument in convert_instlatx64 tool * DB: add Cezanne * DB: add Xeon E3 1275 * CI: use microsoft/setup-msbuild@v1.0.2 * CI: fix deprecated commands * Tests: add Core i5 8265U (Whiskey Lake-U) * DB: add Whiskey Lake-U- Update to version 0.5.0+git.20201114: * Tests: fix path for cpuid_tool When we use CMake, the 'cpuid_tool' binary is in the 'build' directory * DB: add Vermeer https://en.wikichip.org/wiki/amd/cores/vermeer Test file converted from http://users.atw.hu/instlatx64/AuthenticAMD/AuthenticAMD0A20F10_K19_Vermeer_CPUID1.txt * DB: add Gemini Lake https://en.wikichip.org/wiki/intel/cores/gemini_lake Reported in X0rg/CPU-X#164 * DB: add Comet Lake-U https://en.wikipedia.org/wiki/Comet_Lake_(microprocessor)#U-series_(Medium_power) Reported in X0rg/CPU-X#162 * DB: add Kaby Lake-G https://en.wikichip.org/wiki/intel/cores/kaby_lake_g Test file converted from http://users.atw.hu/instlatx64/GenuineIntel/GenuineIntel00906E9_KabylakeG_CPUID.txt * DB: add Kaby Lake Refresh https://en.wikichip.org/wiki/intel/cores/kaby_lake_r Core i5 8250U was detected as Coffee Lake wrongly. Reported in X0rg/CPU-X#161- Update to version 0.5.0+git.20201019: * Fixes issue #148: CMake build script not in 0.5.0 tarball release- Update to version 0.5.0+git.20200528: * Related to c2645d0. Convert all python scripts to Python 3. * Add Downloads section on Readme.md Close #140 * Add I-Nex to the users list- Update to version v0.5.0+git.20200526: * CI: remove 'v' prefix in assets * CI: checkout sources before making release * Release version 0.5.0 (#146) * Add GitHub workflows for CI/CD - CI: it will check code consistency and run tests for all events (except for tags) - CD: it will build all assets and create a draft Close #122 * check-consistency: return error count * Fix code consistency Result before this patch: * CMake: fix include directory * CMake: fix build on Windows * CMake: fix install target's export * tests: fix unused-result warning in convert_instlatx64 tool * Update .gitignore * CMake: fix Unix install and format * Add config file for cmake-format It formats CMakeLists.txt files See https://github.com/cheshirekow/cmake_format * Doxygen: upgrade Doxyfile to avoid warnings warning: Tag 'PERL_PATH' at line 1032 of file '/libcpuid/build/libcpuid/Doxyfile' has become obsolete. To avoid this warning please remove this line from your configuration file or upgrade it using "doxygen -u" warning: argument 'a4wide' for option PAPER_TYPE is not a valid enum value Using the default: a4! * Doxygen: turn on quiet mode It is too noisy with CMake * Detect AVX512VBMI and AVX512VBMI2 features on Intel CPUs More information: https://en.wikichip.org/wiki/x86/avx-512 Resolve #134 * Detect ABM feature on Intel CPUs Resolve #144 * Detect RDSEED/ADX/SHA_NI features on AMD CPUs These x86 instruction set extensions are present since Zen micro-architecture Resolve #145 * Update cpuid_main.c * DB: add Ivy Bridge-E (Xeon) * Tests: update all tests to add fields for L1I * Tests: update to add L1I information Related to 25d0614811991c855ce7db0d898dbc6200dfa840 Dump of Core i5 520m from CPU-X#119 * Add L1 Instruction Cache information Some CPUs does not have the same associativity for L1D and L1I, as reported in X0rg/CPU-X#119 It adds l1_instruction_assoc and l1_instruction_cacheline in cpu_id_t To avoid confusing, also adds l1_data_assoc and l1_data_cacheline l1_assoc and l1_cacheline are leave untouched for backward compatibility * Ignore .vscode directory Yes, 0b05f45e03b0aa39a65eba9451b59c9381e8474c was about VS Code * Tests: add amd_fn8000001dh subleaf See e562798cecf4af852fdfef4b0e7bf159a5d9b4de * Tests: parse subleafs in convert_instlatx64 Also, it adds 0xffffffff when data is not available, so all lines are presents * Re-fix L3 cache associativity detection on AMD Zen 2 CPUs Previous commit: 848394ee460c70298f91569d33f2c156bddb0f6c * Applied a patch from @tavplubix * Use constant for registers name It helps when reading technical documentation and it avoids 'magic values' * Remove all trailling spaces It is annoying with some text editors * DB: fix Rome extended model * DB: add Renoir APUs * Tests: add Core i5 8250U Related to X0rg/CPU-X#129 * DB: add Ice Lake CPUs * DB: add Comet Lake CPUs * DB: add Coffee Lake Refresh It differs from Coffee Lake by stepping Core i5 9400 and 9500 will still be detected as Coffee Lake because it only differs by revision... * DB: add Coffee Lake-U It differs from Kaby Lake-U by stepping * DB: add Cannon Lake CPUs * DB: clarify Intel Generations * tests: remove duplicate addresses in RAW part * tests: fix convert_instlatx64 tool * Fix L3 cache associativity detection on AMD Zen 2 CPUs * Fix CMake * Add CMake * Add CMake- Update to version 0.4.1+git.20200102: * DB: Add Threadripper (Castle Peak) * Fix compilation on non-x86/ARM architectures. * Add support for get_total_cpus on Haiku. * Some typo fixes in human readable text. * Add Xeon CLX (Cascade lake-based) using data from PR #129 * add support to feature intel avx512_vnni * AARCH64 stub * Ignore convert_instlatx64 binary * add Hygon Dhyana C86 7seris test file * Add Hygon Dhyana detect support - Switch to _service- Use noun phrase in summaries.- Update to version 0.4.1: * Better support for Skylake Core i5 (#76) * Misdiagnosis microarchitecture for i3-3220T (#81) * Ability to dump MSR values to a file (PR #82) * AMD Ryzen support (#86) * Support for Coffee and Kaby Lake (#104) * Support for Raven Ridge and Threadripper (#106) * Support for Pinnacle Ridge (#111) * Fix P-III Celeron misdetection * Support for Skylake-X (#116) * Support for Zen+ Threadripper- Enable internal tests- Update to version 0.4.0: * A backwards-incompatible change, since the sizeof cpu_raw_data_t and cpu_id_t are now different. * Better detection of AMD clock multiplier with msrinfo. * Support for Intel SGX detection - Some packaging cleanups * Use url as source * Split binary from devel package- Update from 0.1.0 to 0.3.0: * Added intel_fn11 fields to cpu_raw_data_t to handle new processor topology enumeration required on Core i7 * Support for Intel Nehalem architecture CPUs (Core i7, Xeon i7) * Added support for greater more accurate CPU clock measurements with cpu_clock_by_ic() * Support for AMD Bulldozer CPUs, 128-bit SSE unit size checking. A backwards-incompatible change, since the sizeof cpu_id_t is now different. * Support for Ivy Bridge, and detecting the presence of the RdRand instruction. * Support for newer processors up to Haswell and Vishera * Fix clock detection in cpu_clock_by_ic() for Bulldozer * Support for detection of AVX/AVX2/BMI1/BMI2 * More entries supported in cpu_msrinfo() * Rename of some CPU codenames, made more consistent * *BSD and Solaris support (unofficial) * A backwards-incompatible change, since the sizeof cpu_raw_data_t and cpu_id_t are now different. * Support for processors up to Skylake. * Fix clock detection in cpu_clock_by_ic() for Skylake. * Support up to 8 subleaf entries for CPUID leaf 04 and detection of L4 cache. * MSR functions supported on FreeBSD. * INFO_VOLTAGE request supported by cpu_msrinfo()./sbin/ldconfig/sbin/ldconfigs390zl28 16620457960.5.1+git.1644144775-bp155.1.30.5.1+git.1644144775-bp155.1.3libcpuid.so.15libcpuid.so.15.0.1libcpuid15AUTHORSCOPYING/usr/lib64//usr/share/licenses//usr/share/licenses/libcpuid15/-fmessage-length=0 -grecord-gcc-switches -O2 -Wall -D_FORTIFY_SOURCE=2 -fstack-protector-strong -funwind-tables -fasynchronous-unwind-tables -fstack-clash-protection -gobs://build.opensuse.org/openSUSE:Backports:SLE-15-SP5/standard/904536c46345c45eab85da771d5d9401-libcpuidcpioxz5s390x-suse-linuxELF 64-bit MSB shared object, IBM S/390, version 1 (SYSV), dynamically linked, BuildID[sha1]=28fd5f0d53b8f59a25f8ff34931e73c14285d05f, strippeddirectoryASCII text PRRRR RRRRi0 T{fzutf-83b6714aff1af2e888217cb851132dd269f1b2508d84f74ccd211f1ea6b00503c?7zXZ !t/OW,] cr$x#Hr>r^14K~ .mkI9/H1F0{7mX[\D/N/" 'jpy>,.cIT/#rS$hglO6q54K=:aȵ_GsmFHߪ|SU5=u:@`*n)glX@۵CE`L5Zak G0 \"[d@^-͸ [\L}\3[/D_t=JCDώѼC4pܽ=s7=gkT9!+؊̎Юʪi$9.!57%[ $0.$1X#6,<کk|z~n͚ClV'2B>B@(?X?T*a:`Y"%p8\ dELg4^? 8jiwс?Wv,+94GҕnD\hl9Xy ΣP #nfP/cwhMV#*]BP!rQ`zҥ_SBf=33TaЪ7>XEg0ԏJN{,ʚQ#h=l6,tQq/ %9t.GS#NW}RQ ɚyhWTa}zNӱ BHb x6BTRҦI̺i;3u$ٹ~34U E5?5U? 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