libcpuid16-0.6.2-bp155.1.6 >  A dkBrI%z BGk# c ˿/vwhU8C 4@1뎩ujr uXEY㠮 hDY\\t g[a֜.DBnbH~Zӟ]*Ɛ 0s%}_8lb+*ӡz$ ׮tnVQ@&c!ZBK-y([itZHپ֏%"# ETOt28(fV;{ֆ48;k9D/Le 8'ݑ^jj9B޿h/lrF/p -z+,"W11KG2b9詈-+Ez2"t׹ ߩmMAggO>z'9Ho}THw/zu$yą@5N"`f¹Z^K85p#lcc].05g6 ?>2u!n<5#!S:"Lܘ?Iq,c;e~+gZ*)mJ yg9nߜ!F+jLKxP%ca H7eJ769@5Xng"[K/%O]>p@0?0d   J =CL` j t  M dx @ 9 ([8d9:>- @-F-'G-<H-PI-dX-lY-x\-]-^-b..c.d/Ae/Ff/Il/Ku/`v/tw0x00y0Dz0X0h0l0r0Clibcpuid160.6.2bp155.1.6Library providing CPU identification for x86Libcpuid provides CPU identification for the x86 (and x86_64) architectures.dkBJobs-arm-1SUSE Linux Enterprise 15 SP5openSUSEBSD-2-Clausehttps://bugs.opensuse.orgDevelopment/Libraries/C and C++https://github.com/anrieff/libcpuidlinuxaarch64x8A큤dkB@dkBBdkBIcncnf17a168b93c49f4a219e1fbfed13a8e0e63f55e28a1dbc7d104e5f4b03f2ab9f0264f4385afe458436c934d86a236c33cd686ca385d0435d7c5624c772928dc2d1d843ab08ced2e4c889f3d482055675752c715313ce34239a193e6461475772libcpuid.so.16.0.2rootrootrootrootrootrootrootrootrootrootlibcpuid-0.6.2-bp155.1.6.src.rpmlibcpuid.so.16()(64bit)libcpuid16libcpuid16(aarch-64)@@@@    /sbin/ldconfig/sbin/ldconfigld-linux-aarch64.so.1()(64bit)ld-linux-aarch64.so.1(GLIBC_2.17)(64bit)libc.so.6()(64bit)libc.so.6(GLIBC_2.17)(64bit)rpmlib(CompressedFileNames)rpmlib(FileDigests)rpmlib(PayloadFilesHavePrefix)rpmlib(PayloadIsXz)3.0.4-14.6.0-14.0-15.2-14.14.3ccF@c8+ba(`]__@_5+@^^)\f\eX@Y9<@X<@XkDirk Müller Martin Pluskal Dirk Müller Martin Pluskal Martin Pluskal Martin Pluskal Martin Pluskal Martin Pluskal Martin Pluskal Martin Pluskal Martin Pluskal Jan Engelhardt Martin Pluskal mpluskal@suse.commpluskal@suse.comdap.darkness@gmail.com- update to 0.6.2: * Support for AMD Raphael * Support for AMD Dali * Support for AMD Van Gogh * Fix stuck cpuid_tool due to set_cpu_affinity() on Windows (#172) * Remove AMD Warhol from DB (Zen3+ cancelled) * Fix physical core count computed by cpu_identify_all() when HT is disabled (#175) * Fix shared library symlinks with CMake (#174) * Support for Intel Raptor Lake-S * Fix segmentation fault in cpu_identify_all() for single-core CPUs * Support for Intel Penryn L * Support for Intel Tremont * Support for AMD Mendocino * Support for Intel Ice Lake (Xeon-D) * Support for AMD Zen 2 Desktop Kit CPUs (4700S + 4800S) * Support for AMD Athlon 64 Sherman- Add missing dependency- update to 0.6.0: * Support for AMD Rembrandt * Support for AMD Warhol * Remove Debian package from source tree (#165) * Fix build under Clang 15 (#167) * Support for AMD Athlon Godavari * Support for hybrid CPU like Intel Alder Lake (#166) * Detect presence of hypervisor (#169) * Decode deterministic cache info for AMD CPUs (#168) * Add cache instances field in cpu_id_t and system_id_t (#168) * Support AMD Bald Eagle * Support for more AMD Godavari (Athlon) * Rename AMD Bulldozer to Zambezi * Support for AMD Interlagos * Support for AMD Abu Dhabi * Support for AMD Beema * Support for AMD Steppe Eagle * Support for more AMD Kabini (Sempron + Athlon) * Improve msr_serialize_raw_data() * Support for AMD Zen 2 custom APU for Steam Deck- Update to version 0.5.1+git.1644144775: * Tests: add more Zen2 tests from InstLatx64 * DB: add Lucienne * Report memory allocation failures without segfaulting. (#160) * Don't link with msrdriver.c on non-Windows platform. (#159)- Update to version 0.5.1+git.1626502835: * CMake: reduce min cmake requirement 3.14 -> 3.13 * Fix failing CI builds introduced by cb5fdd1 * Use popcount64 from libc when available (#152) * allow to build either static or shared (#156) * cmake: allow libcpuid to be added as a CMake subproject (#155) * fix installation of BUNDLE if iOS (#154) * cmake: add an option to build tests (#153) * Fix #150: CPU Family/Model is used as Ext.Family/Model * DB: add Tiger Lake- Update to version 0.5.1+git.1616323866: * Doxygen: remove deprecated option * Release version 0.5.1 (#151) * Tests: fix truncation warnings in convert_instlatx64 * Fix warning with a comment * DB: add Rocket Lake * DB: add Milan * Tests: fix --create argument in convert_instlatx64 tool * DB: add Cezanne * DB: add Xeon E3 1275 * CI: use microsoft/setup-msbuild@v1.0.2 * CI: fix deprecated commands * Tests: add Core i5 8265U (Whiskey Lake-U) * DB: add Whiskey Lake-U- Update to version 0.5.0+git.20201114: * Tests: fix path for cpuid_tool When we use CMake, the 'cpuid_tool' binary is in the 'build' directory * DB: add Vermeer https://en.wikichip.org/wiki/amd/cores/vermeer Test file converted from http://users.atw.hu/instlatx64/AuthenticAMD/AuthenticAMD0A20F10_K19_Vermeer_CPUID1.txt * DB: add Gemini Lake https://en.wikichip.org/wiki/intel/cores/gemini_lake Reported in X0rg/CPU-X#164 * DB: add Comet Lake-U https://en.wikipedia.org/wiki/Comet_Lake_(microprocessor)#U-series_(Medium_power) Reported in X0rg/CPU-X#162 * DB: add Kaby Lake-G https://en.wikichip.org/wiki/intel/cores/kaby_lake_g Test file converted from http://users.atw.hu/instlatx64/GenuineIntel/GenuineIntel00906E9_KabylakeG_CPUID.txt * DB: add Kaby Lake Refresh https://en.wikichip.org/wiki/intel/cores/kaby_lake_r Core i5 8250U was detected as Coffee Lake wrongly. Reported in X0rg/CPU-X#161- Update to version 0.5.0+git.20201019: * Fixes issue #148: CMake build script not in 0.5.0 tarball release- Update to version 0.5.0+git.20200528: * Related to c2645d0. Convert all python scripts to Python 3. * Add Downloads section on Readme.md Close #140 * Add I-Nex to the users list- Update to version v0.5.0+git.20200526: * CI: remove 'v' prefix in assets * CI: checkout sources before making release * Release version 0.5.0 (#146) * Add GitHub workflows for CI/CD - CI: it will check code consistency and run tests for all events (except for tags) - CD: it will build all assets and create a draft Close #122 * check-consistency: return error count * Fix code consistency Result before this patch: * CMake: fix include directory * CMake: fix build on Windows * CMake: fix install target's export * tests: fix unused-result warning in convert_instlatx64 tool * Update .gitignore * CMake: fix Unix install and format * Add config file for cmake-format It formats CMakeLists.txt files See https://github.com/cheshirekow/cmake_format * Doxygen: upgrade Doxyfile to avoid warnings warning: Tag 'PERL_PATH' at line 1032 of file '/libcpuid/build/libcpuid/Doxyfile' has become obsolete. To avoid this warning please remove this line from your configuration file or upgrade it using "doxygen -u" warning: argument 'a4wide' for option PAPER_TYPE is not a valid enum value Using the default: a4! * Doxygen: turn on quiet mode It is too noisy with CMake * Detect AVX512VBMI and AVX512VBMI2 features on Intel CPUs More information: https://en.wikichip.org/wiki/x86/avx-512 Resolve #134 * Detect ABM feature on Intel CPUs Resolve #144 * Detect RDSEED/ADX/SHA_NI features on AMD CPUs These x86 instruction set extensions are present since Zen micro-architecture Resolve #145 * Update cpuid_main.c * DB: add Ivy Bridge-E (Xeon) * Tests: update all tests to add fields for L1I * Tests: update to add L1I information Related to 25d0614811991c855ce7db0d898dbc6200dfa840 Dump of Core i5 520m from CPU-X#119 * Add L1 Instruction Cache information Some CPUs does not have the same associativity for L1D and L1I, as reported in X0rg/CPU-X#119 It adds l1_instruction_assoc and l1_instruction_cacheline in cpu_id_t To avoid confusing, also adds l1_data_assoc and l1_data_cacheline l1_assoc and l1_cacheline are leave untouched for backward compatibility * Ignore .vscode directory Yes, 0b05f45e03b0aa39a65eba9451b59c9381e8474c was about VS Code * Tests: add amd_fn8000001dh subleaf See e562798cecf4af852fdfef4b0e7bf159a5d9b4de * Tests: parse subleafs in convert_instlatx64 Also, it adds 0xffffffff when data is not available, so all lines are presents * Re-fix L3 cache associativity detection on AMD Zen 2 CPUs Previous commit: 848394ee460c70298f91569d33f2c156bddb0f6c * Applied a patch from @tavplubix * Use constant for registers name It helps when reading technical documentation and it avoids 'magic values' * Remove all trailling spaces It is annoying with some text editors * DB: fix Rome extended model * DB: add Renoir APUs * Tests: add Core i5 8250U Related to X0rg/CPU-X#129 * DB: add Ice Lake CPUs * DB: add Comet Lake CPUs * DB: add Coffee Lake Refresh It differs from Coffee Lake by stepping Core i5 9400 and 9500 will still be detected as Coffee Lake because it only differs by revision... * DB: add Coffee Lake-U It differs from Kaby Lake-U by stepping * DB: add Cannon Lake CPUs * DB: clarify Intel Generations * tests: remove duplicate addresses in RAW part * tests: fix convert_instlatx64 tool * Fix L3 cache associativity detection on AMD Zen 2 CPUs * Fix CMake * Add CMake * Add CMake- Update to version 0.4.1+git.20200102: * DB: Add Threadripper (Castle Peak) * Fix compilation on non-x86/ARM architectures. * Add support for get_total_cpus on Haiku. * Some typo fixes in human readable text. * Add Xeon CLX (Cascade lake-based) using data from PR #129 * add support to feature intel avx512_vnni * AARCH64 stub * Ignore convert_instlatx64 binary * add Hygon Dhyana C86 7seris test file * Add Hygon Dhyana detect support - Switch to _service- Use noun phrase in summaries.- Update to version 0.4.1: * Better support for Skylake Core i5 (#76) * Misdiagnosis microarchitecture for i3-3220T (#81) * Ability to dump MSR values to a file (PR #82) * AMD Ryzen support (#86) * Support for Coffee and Kaby Lake (#104) * Support for Raven Ridge and Threadripper (#106) * Support for Pinnacle Ridge (#111) * Fix P-III Celeron misdetection * Support for Skylake-X (#116) * Support for Zen+ Threadripper- Enable internal tests- Update to version 0.4.0: * A backwards-incompatible change, since the sizeof cpu_raw_data_t and cpu_id_t are now different. * Better detection of AMD clock multiplier with msrinfo. * Support for Intel SGX detection - Some packaging cleanups * Use url as source * Split binary from devel package- Update from 0.1.0 to 0.3.0: * Added intel_fn11 fields to cpu_raw_data_t to handle new processor topology enumeration required on Core i7 * Support for Intel Nehalem architecture CPUs (Core i7, Xeon i7) * Added support for greater more accurate CPU clock measurements with cpu_clock_by_ic() * Support for AMD Bulldozer CPUs, 128-bit SSE unit size checking. A backwards-incompatible change, since the sizeof cpu_id_t is now different. * Support for Ivy Bridge, and detecting the presence of the RdRand instruction. * Support for newer processors up to Haswell and Vishera * Fix clock detection in cpu_clock_by_ic() for Bulldozer * Support for detection of AVX/AVX2/BMI1/BMI2 * More entries supported in cpu_msrinfo() * Rename of some CPU codenames, made more consistent * *BSD and Solaris support (unofficial) * A backwards-incompatible change, since the sizeof cpu_raw_data_t and cpu_id_t are now different. * Support for processors up to Skylake. * Fix clock detection in cpu_clock_by_ic() for Skylake. * Support up to 8 subleaf entries for CPUID leaf 04 and detection of L4 cache. * MSR functions supported on FreeBSD. * INFO_VOLTAGE request supported by cpu_msrinfo()./sbin/ldconfig/sbin/ldconfigobs-arm-1 16847509220.6.2-bp155.1.60.6.2-bp155.1.6libcpuid.so.16libcpuid.so.16.0.2libcpuid16AUTHORSCOPYING/usr/lib64//usr/share/licenses//usr/share/licenses/libcpuid16/-fmessage-length=0 -grecord-gcc-switches -O2 -Wall -D_FORTIFY_SOURCE=2 -fstack-protector-strong -funwind-tables -fasynchronous-unwind-tables -fstack-clash-protection -gobs://build.opensuse.org/openSUSE:Backports:SLE-15-SP5/standard/2487a0efe3f134aedc1b02a39b54ddd3-libcpuidcpioxz5aarch64-suse-linuxELF 64-bit LSB shared object, ARM aarch64, version 1 (SYSV), dynamically linked, BuildID[sha1]=d762247d8a764917e905fd4683a342c33dddeb48, strippeddirectoryASCII textPRRRR,!;)(9EA/ ۍutf-84c985b3cc3f93b8035194eb0a1eee71e423861a0e36192fbacf9e36c3e8cf65d?7zXZ !t/s] cr$x#HGOcCRa #'PE&Y( eJCS5YvZGu|BoZxohL[t2>\ ZYzA=L 4p3 $j=TUK)XV4.JluNA8 o+P)M6AdGRū1m2xҞ ~w(/ $W?||ї) Dj` >":V9mIZ tc@엻zFGHʡ`DrX"]T(yBrd??@{[Z{Gp gTv*.8Qf-U>(c&P hL?\U'iдׄ &myRp} =]?3(EeZ(/!ɾ[dF l2JY؃pE7y۱ak֭όA}JDbp5rmZTzte˻jI|^8줘ˆz1 O_4֝kliJUNc튊 8W˜ru"~~yPNѹ>eͬ?׌&JWkS^f(32d{0hӭ٫&*l\x R[mPhH9s@F8 55~lo~w%B'(ܬjN * G^vu-F  mi8ۏw1 ^wHcRg|#TnUKL3GyƞFϓa(]܆V}Jil\Y4}A-0*Vp]}jw]yh  SvAQa<j=eE2M|Fh&?\uԸq۾l'a/;0$݀Ni>/U[`P56)k6UExndaqEhXǠm??$TMt+\Y !*V:N'j |ůo ]<%Wkt:#8s2 ؅^oi-,7" ;L0r]@Hc(}RMC\AzPzLI,Sz<-M,_jpXt ՚zK胈Cg#= p]hmdܝuͭxP*A>:faw鱺ߨ*j L;?,` i0kc,7-qcSa=%8opʜBMҏb23ӈ֜ʘ'WJ@Tpؐ?V'ۯ~&GhsaÒwI!Z /#B=v‹aȜͺEw6Xz ²LFh+b!Dg FTN5Rft:e)ڕkQLUcù,/úH4}YMۏ[x¯0ܢ GwKtgʹ3ԷH`l GolkrxM|IOFn|S`70rm(G ;]ܚl+T@9៽d|F+bYPŢ۬Ÿyͺ|sTO7 Xm4,y7kpm3w<5Nʑ jp;GÿzII]U9PDiGE+{[=~wz/÷;*@ '|b Lw<^Unn}Ic;sHd,٨8D5US P>/ŽuLШ<$(XI^  vs4i1GǺ?>rS+;B򎅥~۬eXsP}7P\̸ckZif`eiA?e%fkdsDb)S-&.|rrhzlRefP{rY(,PV ]Ty,|v%Q mi>DNBBNUS0i ~znޝ 75]X7bS곶z3 /fi-8 YE2۟w$fiCdr]4PT01 e=DvXb;ħ;#2w c!HFhG+cgФ\ M%H6{1BsӚDN&Ha<%0a űW(1ȗ4CBJ/7Ո_fzUCJ^lu2(' f!Pv%]\S=y[LeO^ ;..c`4Lt!t0-& C87 $봷K{FlD$0\9IC|eP5TGP/YG-bIY\}aމ?`EoQN&dMQ¥kG 5*:oĽa汼]W:2IaV?Y>cSVУJ;#$--Pft,g"!r⢖XYf QTQ36>QYImo~?kP[,=dm(BuZ±csƢ<ͱ%@`7+"J;%o4bNJ,?I mioĊ8qFFMǠM/:ƤF"%L˝Ÿ=1$UUf( b${yeA-7>*O{o4U1*1p Q)hc`0i%t cfO~0MˢTįDJKWX$;A pR!%H74D )LT!U(d/ㇺ,OdZ- :cnVͮ=XsUm$qd:q/Y&"$ЂMVhv)X I懣fb{'˜h??]K+?g_YL@XW׹ۈhPw)F1ֲPuL3m8ۋ3F3㙞|Ӳf*`dhLH0/ޏԊ^l| |cvwxa :YWB1v[k/wxUMx5AhgvT, 9B%l1Yx mjэ>N/HaoFC| ElW[P>Ry^LRB2e-|BDSTrߖS/ CL I'm}U@$>cjHkS<y395W!s`N\ٸhްD bQ9k#هd:Cr˴s\0G6 mKS#wPE.,A{"~EH~B‡tSU`ٝh$>貏kP"_:*kA06-?Pk NK$iie!vK΍lUn9=Tn*ʍ7_ج=V!Ԇ |v9>YW&ۅ][G"OX錳6<#p\SFA:<Бs|d=ƯLN:&b]!GnK3O?HbB/8=m׏l R>Y] zz"[)mNe2苌#JAO`RII4}3BFl}i(|zM*S kܚ~h3Yl91ݷh p!kԚ2n%?ϴ"(r0$W3^RW1=sY$Ӫ0;62PR CȑΌzβ{X*41)JUsqC,j.ydGmgfm6 I֟6Xk h|D.A~Só1 >-µ<[>$](hn:|D ҍbX=s>30 38BJb7BE]4-ږ*tќ a>i:?PXCiGR&oz¥3i^bCVhhP9ogL?:$YI}I`bGљj@[*/l%mE:f6z) 9J褑iP|gáe݆I<{zS\7Ez38N8Uty nN8Y#|*ӦA-rV&z&S'$"(4x6ek)SU TO`Mv\sa>kd Kv% N!KυQ b`gP3nMe:uۃh~JrfY:i"NVkRNqU / =4Kd (,ks^6 rnmT="^O  .zyT U'$dHfxO~؛%6a_^G6 bILɮxw{{>*t\z`,t*Hĩ $3m[Tv 6_7*-+(4k$jL 0 MڊQoCMxw<¡^IQs9蜷X<)YOs!U|'MjmZ& .90$[[ѹlj;KCϭeU\1h!`dy¡5`/H9.7VqIvb|bUZ ZFիeNh,pyw̦P/~ߤL4['qB,2U>L@&5:}rK3uOtЮf #嗢Kvh!)#{i/'~۞U t%U Ec1b9=Ny{xa3H2R+JdJt,Dpp̮90Ԃ’Z =o~ɱ*=Ѱ*qu1nz l5s\~*JZ{wan9̐ fA\E㎙ tBL/)}Fqw< [GRyGg.,'v!J*eJj 9P§2DE#Ȯ5vTv5$sU}]L\44axԪfpZ Ls{1p@sKH8cg߯Kk Ue(B"/9Nl3B0K<Tt9FLCeWtQ S!e5#1>4Σ&OmUR2%VDZ.Ƣ! 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